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Graph Partitioning

Here is a list of publications that are directly related to our graph partitioning research.

  1. Interleaving of Gate Sizing and Constructive Placement for Predictable Performance.

    Sungjae Kim, Eugene Shragowitz, George Karypis, and Rung-Bin Lin . International Symposium on VLSI Design, Automation, and Test, pp. 1-4, 2007.

  1. Multilevel Algorithms for Partitioning Power-Law Graphs.

    Amine Abou-Rjeili and George Karypis. IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2006.

  1. Multi-Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization.

    Navaratnasothie Selvakkumaran and George Karypis. IEEE Transactions on CAD, 25(3), pp. 504-517, 2006.

  1. Multi-Resource Aware Partitioning Algorithms for FPGAs with Heterogeneous Resources.

    Navaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, and George Karypis. 41st Design Automation Conference, pp. 741-746, 2004.

  1. Multi-Constraint Mesh Partitioning for Contact/Impact Computations.

    George Karypis. Supercomputing, 2003.

  1. Multi-Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization.

    Navaratnasothie Selvakkumaran and George Karypis. IEEE/ACM International Conference on Computer Aided Design (ICCAD), 726-733, 2003.

  1. Perimeter Degree: A Priori Metric for Directly Measuring and Homogenizing Interconnection Complexity in Multilevel Placement.

    Navaratnasothie Selvakkumaran, Phiroze Parakh, and George Karypis. IEEE Conference on System Level Interconnect Prediction (SLIP), pp. 53 - 59, 2003.

  1. Multi-Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization.

    Navaratnasothie Selvakkumaran and George Karypis. Proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), pp. 726-733, 2003.

  1. Parallel static and dynamic multi-constraint graph partitioning.

    Kirk Schloegel, George Karypis, and Vipin Kumar. Concurrency and Computation: Practice and Experience. Volume 14, Issue 3, pages 219 - 240, 2002.

  1. Multi-objective Circuit Partitioning for Cutsize and Path-based Delay Minimization.

    Cristinei Ababel, Navaratnosothie Selvakkumaran, Kia Bazargan, and George Karypis. IEEE/ACM International Conference on Computer Aided Design (ICCAD), pp. 181 - 185, 2002.

  1. Wavefront Diffusion and LMSR: Algorithms for Dynamic Repartitioning of Adaptive Meshes.

    Kirk Schloegel, George Karypis, and Vipin Kumar. IEEE Transactions on Parallel and Distributed Systems. Vol. 12, No. 5, 451 - 466, 2001.

  1. Multilevel k-way Hypergraph Partitioning.

    George Karypis and Vipin Kumar. VLSI Design, Vol. 11, No. 3, pp. 285 - 300, 2000.